x86 Instruction Set Reference

FSCALE - Scale

Opcode Mnemonic Description
D9 FD FSCALE Scale ST(0) by ST(1).
Description

Truncates the value in the source operand (toward 0) to an integral value and adds that value to the exponent of the destination operand. The destination and source operands are floating-point values located in registers ST(0) and ST(1), respectively. This instruction provides rapid multiplication or division by integral powers of 2. The following table shows the results obtained when scaling various classes of numbers, assuming that neither overflow nor underflow occurs.

FSCALE Results
-ST(1): -infST(1): -FST(1): -0ST(1): +0ST(1): +FST(1): +infST(1): NaN
ST(0): -infNaN-inf-inf-inf-inf-infNaN
ST(0): -F-0-F-F-F-F-infNaN
ST(0): -0-0-0-0-0-0NaNNaN
ST(0): +0+0+0+0+0+0NaNNaN
ST(0): +F+0+F+F+F+F+infNaN
ST(0): +infNaN+inf+inf+inf+inf+infNaN
ST(0): NaNNaNNaNNaNNaNNaNNaNNaN
F Means finite floating-point value.

In most cases, only the exponent is changed and the mantissa remains unchanged.

However, when the value being scaled in ST(0) is a denormal value, the mantissa is also changed and the result may turn out to be a normalized number. Similarly, if overflow or underflow results from a scale operation, the resulting mantissa will differ from the source's mantissa.

The FSCALE instruction can also be used to reverse the action of the FXTRACT instruction, as shown in the following example: FXTRACT; FSCALE; FSTP ST(1); In this example, the FXTRACT instruction extracts the mantissa and exponent from the value in ST(0) and stores them in ST(0) and ST(1) respectively. The FSCALE then scales the mantissa in ST(0) by the exponent in ST(1), recreating the original value before the FXTRACT operation was performed. The FSTP ST(1) instruction overwrites the exponent (extracted by the FXTRACT instruction) with the recreated value, which returns the stack to its original state with only one register [ST(0)] occupied.

Operation
ST(0) = ST(0) * 2RoundTowardZero(ST(1));
FPU flags affected

C1 Set to 0 if stack underflow occurred. Set if result was rounded up; cleared otherwise. C0, C2, C3 Undefined.

Floating-Point Exceptions
#ISStack underflow occurred.
#ISStack underflow occurred.
#IASource operand is an SNaN value or unsupported format.
#DSource operand is a denormal value.
#UResult is too small for destination format.
#OResult is too large for destination format.
Protected Mode Exceptions
#NMEM or TS in CR0 is set.
Real-Address Mode Exceptions
#NMEM or TS in CR0 is set.
Virtual-8086 Mode Exceptions
#NMEM or TS in CR0 is set.
Instruction Latency Throughput Execution Unit
CPUID0F3n/0F2n0F3n/0F2n0F2n
FSCALE607-